Generally, a semiconductor package has a structure in which a semiconductor chip is covered with a resin portion.
For example, side surfaces and an active surface (circuit forming surface) of a semiconductor chip may be covered with a resin portion. And, a wiring structure in which a wiring layer electrically connected to the semiconductor chip and an insulating layer are stacked may be further formed on the resin portion.
For example, JP-4271590-B discloses a manufacturing method for such a semiconductor chip.
For example, a supporting body is prepared. A semiconductor chip is mounted on the prepared supporting body such that a surface of the semiconductor chip, which is opposite to an active surface thereof, touches a surface of the supporting body. Then, the mounted semiconductor chip is sealed with a resin portion. Thereafter, a wiring layer and an insulating layer are stacked on the resin portion to form a wiring structure. Then, the supporting body is removed. Thus, a semiconductor package is manufactured.
In order to reduce the thickness of a semiconductor package, it may be requested to reduce the thickness of a resin portion. For example, a supporting body is prepared, a concave portion is formed in the supporting body by removing a part thereof to a certain depth, a semiconductor chip is arranged on the formed concave portion, a resin portion and a wiring structure is formed, and then, the supporting body is removed, to thereby manufacture a semiconductor package while reducing the thickness of the resin portion in a region around the semiconductor chip.
On the other hand, it is difficult to partly remove the support body at a uniform depth from the surface thereof by, e.g., etching. Thus, an in-plane variation of the depth of the formed concave portion may occur, and the surface flatness of the resin portion covering the semiconductor chip may be poor.